Wireless Transceivers

The increasing use of high-speed digital processing in wireless transceivers, as well as a strong interest in software defined radio (SDR), has lead to a radical change in the way we approach custom DSP design. Not so long ago, the use of DSP in wireless systems was mainly limited to the modem, as in the direct-conversion receiver shown in figure 2 below. Here the channel selection is carried out in the analog domain, by tuning the LO to the desired channel frequency, and using analog filters to reject other channels and interfering signals. This receiver architecture has the advantage that an AGC (Automatic Gain Control) loop can be used to maintain a steady user signal level at the input of the A/D converter. As a result, the noise contribution from the DSP sub-system (the modem receiver) is not critical for the performance of the receiver and is typically included in the required Eb/N0 rather than the receiver noise figure.
However, in the new generation of DSP-centric, multi-standard receivers, the A/D converter and part of the DSP have moved beyond the AGC loop, as illustrated by the IF-sampling receiver in figure 3. In this type of receiver, a whole block of channels is down-converted to IF (Intermediate Frequency) using a fixed LO followed by a wideband bandpass filter. The channel selection is performed entirely in the digital domain by a DDC (Digital Down-Converter). Because the signal at the input of the A/D converter is now a superposition of many channels, it is no longer possible to use an AGC loop to control the power level of the desired channel at the A/D input. Instead the AGC must be placed after the DDC. As a result, both the A/D and the DDC are now significant contributors to the noise figure of the receiver. From the perspective of the system architect, the DDC is just like any other part of the radio; it must be assigned a (maximum) noise figure and included in the receiver noise budget where it becomes a part of the total receiver noise figure. For the DSP architect, the DDC represents a new type of design that mixes DSP engineering with radio systems engineering. Just like the analog signal path in a traditional radio, the digital signal path in the DDC must be carefully crafted to strike the right balance between sensitivity, linearity, selectivity and hardware cost (or power consumption).
Traditional methods for custom DSP development are ill-suited for this type of design. These methods often employ a bottom-up approach, where an initial floating-point simulation model is gradually developed into a bit-exact fixed-point model (we discuss this approach in Wireless Modems). When applied to systems with large over-sampling factors, the bottom-up approach leads excessive simulation run times. Hence, while this approach works adequately in modem applications, it is far too time-consuming for DSP radio design. Also, when designing a system to meet a specific noise figure requirement, it is more natural to employ a top-down approach where the gains and noise figures of individual blocks are set first, so as to achieve the required noise figure, before the details of the blocks have been defined.

However, the most severe drawback with traditional methods for custom DSP design is that these methods fail to capitalize on the potential for design automation in DSP radio. Most DSP radio solutions can be assembled from a small set of "standard" DSP structures such as synthesizers, decimation filters and filter banks. With the right methodology, dedicated design tools can be constructed for these DSP structures that allow the design of a DSP radio to be almost completely automated. In contrast, baseband systems tend to be much more heterogeneous (with each wireless standard requiring its own specific modem algorithms) and therefore do not enjoy the same advantage.

Today, we use a design flow for DSP radio applications that is almost entirely automated. For an illustration of this design flow, see the Digital Down-Converter Design example.